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ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 0 ? revision history revision description issue date rev. 1.0. initial issue jul.25.2004 rev. 2.0. revised vcc range( vcc=4.5~5.5v => 2.7~5.5v) ma y .4.2005 rev. 2.1. revised i sb1 ma y .13.2005 rev. 2.2 a dding pkg type : skinny p-dip a ug.29.2005 rev. 2.3 revised v ih (min)=2.4v, v il (max)=0.6v feb.24.2006 rev. 2.4 revised v ih (min)=2.4v, v il (max)=0.6v (v cc =2.7~3.6v) v ih (min)=2.4v, v il (max)=0.8v (v cc =4.5~5.5v) jul.31.2006 rev. 2.5 revised stsop package outline dimension mar.26.2008 rev. 2.6 a dded sl grade added i sb1 /i dr values when t a = 25 and t a = 40 revised features & ordering information lead free and green package available to green package available added packing type in ordering information revised i sb1(max) revised v term to v t1 and v t2 revised test condition of i sb1 /i dr deleted t solder in absolute maximun ratings mar.30.2009 rev. 2.7 revised package outline dimension in page 8 & 9 dec.18.2009 rev. 2.8 rev. 2.9 revised package outline dimension in page 10 revised ordering information in page 12 revised package outline dimension in page 9 ma y .7.2010 aug.25.2010
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 1 ? features ? fast access time : 35/55/70ns ? low power consumption: operating current : 20/15/10ma (typ.) standby current : 1 a (typ.) ? single 2.7~5.5v power supply ? all inputs and outputs ttl compatible ? fully static operation ? tri-state output ? data retention voltage : 1.5v (min.) ? green package available ? package : 28-pin 600 mil pdip 28-pin 330 mil sop 28-pin 8mm x 13.4mm stsop 28-pin 300 mil skinny p-dip general description the ly62256 is a 262,144-bit low power cmos static random access memory organized as 32,768 words by 8 bits. it is fabricated using very high performance, high reliability cmos technology. its standby current is stable within the range of operating temperature. the ly62256 is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. the ly62256 operates from a single power supply of 2.7~5.5v and all inputs and outputs are fully ttl compatible product family product family operating temperature vcc range speed power dissipation standby(i sb1, typ.) operating(icc,typ.) ly62256 0 ~ 70 2.7 ~ 5.5v 35/55/70ns 1a 20/15/10ma ly62256(e) -20 ~ 80 2.7 ~ 5.5v 35/55/70ns 1a 20/15/10ma ly62256(i) -40 ~ 85 2.7 ~ 5.5v 35/55/70ns 1a 20/15/10ma functional block diagram decoder i/o data circuit control circuit 32kx8 memory array column i/o a0-a14 vcc vss dq0-dq7 ce# we# oe# pin description symbol description a0 - a14 address inputs dq0 ? dq7 data inputs/outputs ce# chip enable input we# write enable input oe# output enable input v cc power supply v ss ground
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 2 ? pin configuration a12 a7 a6 a5 a4 a3 a2 a1 a0 dq0 dq1 dq2 vss a14 vcc a8 a9 a11 a10 dq7 dq6 dq5 dq4 dq3 ly62256 skinny p-dip/p-dip/sop 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 a13 ce# oe# we# stsop dq3 a11 a9 a8 a13 dq2 a10 a14 a12 a7 a6 a5 vcc dq7 dq6 dq5 dq4 vss dq1 dq0 a0 a1 a2 a4 a3 ly62256 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 oe# we# ce# absolute maximun ratings* parameter symbol rating unit voltage on v cc relative to v ss v t1 -0.5 to 6.5 v voltage on any other pin relative to v ss v t2 -0.5 to v cc +0.5 v operating temperature t a 0 to 70(c grade) -20 to 80(e grade) -40 to 85(i grade) storage temperature t stg -65 to 150 power dissipation p d 1 w dc output current i out 50 ma *stresses greater than those listed under ?absolute maximum ratings ? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to the absolute maximum rating conditions for extended period may affect device reliabil ity. truth table mode ce# oe# we# i/o operation supply current standby h x x high-z i sb ,i sb1 output disable l h h high-z i cc ,i cc1 read l l h d out i cc ,i cc1 write l x l d in i cc ,i cc1 note: h = v ih , l = v il , x = don't care.
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 3 ? dc electrical characteristics parameter symbol test condition min. typ. * 4 max. unit supply voltage v cc 2.7 3.3 5.5 v input high voltage v ih *1 2.4 - v cc +0.5 v input low voltage v il *2 v cc =2.7~3.6v - 0.5 - 0.6 v v cc =4.5~5.5v - 0.5 - 0.8 v input leakage current i li v cc R v in R v ss - 1 - 1 a output leakage current i lo v cc R v out R v ss , output disabled - 1 - 1 a output high voltage v oh i oh = -1m a 2.4 3.0 - v output low voltage v ol i ol = 2m a - - 0.4 v average operating power supply current i cc cycle time = min. ce# = v il , i i/o = 0ma other pins at v il or v ih -35 - 20 50 m a -55 - 15 45 m a -70 - 10 40 m a i cc1 cycle time = 1 s ce# Q 0.2v and i i/o = 0ma other pins at 0.2v or v cc -0.2v - 3 10 ma standby power supply current i sb ce# = v ih, other pins at v il or v ih -1 3 m a i sb1 ce# v R cc -0.2v others at 0.2v or v cc - 0.2v ll - 1 20 a lle/lli - 1 30 a sl *5 sle *5 sli *5 25 - 1 3 a 40 - 1.5 4 a sl - 1 10 a sle/sli - 1 20 a notes: 1. v ih (max) = v cc + 3.0v for pulse width less than 10ns. 2. v il (min) = v ss - 3.0v for pulse width less than 10ns. 3. over/undershoot specifications are characterized, not 100% tested. 4. typical values are included for reference only and are not guaranteed or tested. typical valued are measured at v cc = v cc (typ.) and t a = 25 5. this parameter is measured at v cc = 3.0v capacitance (t a = 25 , f = 1.0mhz) parameter symbol min. ma x unit input capacitance c in - 6 pf input/output capacitance c i/o - 8 pf note : these parameters are guaranteed by devic e characterization, but not production tested. ac test conditions input pulse levels 0.2v to v cc -0.2v input rise and fall times 3ns input and output timing reference levels 1.5v output load c l = 50pf + 1ttl, i oh / i ol = -1ma/2m a
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 4 ? ac electrical characteristics (1) read cycle parameter sym. ly62256-35 ly62256-55 ly62256-70 unit min. max. min. max. min. max. read cycle time t rc 35 - 55 - 70 - ns a ddress access time t aa - 35 - 55 - 70 ns chip enable access time t ace - 35 - 55 - 70 ns output enable access time t oe - 25 - 30 - 35 ns chip enable to output in low-z t clz * 10 - 10 - 10 - ns output enable to output in low-z t olz * 5 - 5 - 5 - ns chip disable to output in high-z t chz * - 15 - 20 - 25 ns output disable to output in high-z t ohz * - 15 - 20 - 25 ns output hold from address change t oh 10 - 10 - 10 - ns (2) write cycle parameter sym. ly62256-35 ly62256-55 ly62256-70 unit min. max. min. max. min. max. write cycle time t wc 35 - 55 - 70 - ns a ddress valid to end of write t aw 30 - 50 - 60 - ns chip enable to end of write t cw 30 - 50 - 60 - ns a ddress set-up time t as 0 - 0 - 0 - ns write pulse width t wp 25 - 45 - 55 - ns write recovery time t wr 0 - 0 - 0 - ns data to write time overlap t dw 20 - 25 - 30 - ns data hold from end of write time t dh 0 - 0 - 0 - ns output active from end of write t ow * 5 - 5 - 5 - ns write to output in high-z t whz * - 15 - 20 - 25 ns *these parameters are guaranteed by device characterization, but not production tested.
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 5 ? timing waveforms read cycle 1 (address controlled) (1,2) dout data valid t oh t aa address t rc previous data valid read cycle 2 (ce# and oe# controlled) (1,3,4,5) dout data valid t oh oe# t ace ce# t aa address t rc high-z high-z t clz t olz t oe t chz t ohz notes : 1.we# is high for read cycle. 2.device is continuously selected oe# = low, ce# = low . 3.address must be valid prior to or coincident with ce# = low , ; otherwise t aa is the limiting parameter. 4.t clz , t olz , t chz and t ohz are specified with c l = 5pf. transition is measured 500mv from steady state. 5.at any given temperature and voltage condition, t chz is less than t clz , t ohz is less than t olz.
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 6 ? write cycle 1 (we# controlled) (1,2,3,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw ce# t wr t as t aw address t wc (4) t ow write cycle 2 (ce# controlled) (1,2,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw ce# t wr t as t aw address t wc notes : 1.we#, ce# must be high during all address transitions. 2.a write occurs during the overlap of a low ce#, low we#. 3.during a we# controlled write cycle with oe# low, t wp must be greater than t whz + t dw to allow the drivers to turn off and data to be placed on the bus. 4.during this period, i/o pins are in the out put state, and input signals must not be applied. 5.if the ce# low transition occurs simultaneously with or after we# low transition, the outputs remain in a high impedance stat e. 6.t ow and t whz are specified with c l = 5pf. transition is measured 500mv from steady state.
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 7 ? data retention characteristics parameter symbo l test condition min. typ. max. unit v cc for data retention v dr ce# v R cc - 0.2v 1.5 - 5.5 v data retention current i dr v cc = 1.5v ce# v R cc - 0.2v others at 0.2v or v cc -0.2v ll/lle/lli - 0.5 20 a sl sle sli 25 - 0.5 2 a 40 - 1 3 a sl - 0.5 8 a sle/sli - 0.5 15 a chip disable to data retention time t cdr see data retention waveforms (below) 0 - - ns recovery time t r t rc * - - ns t rc * = read cycle time data retention waveform vcc ce# v dr R 1.5v ce# v R cc-0.2v vcc(min.) v ih t r t cdr v ih vcc(min.)
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 8 ? package outline dimension 28 pin 600 mil pdip package outline dimension unit sym. inch.(base) mm(ref) a1 0.015(min) 0.381(min) a2 0.1550.005 3.9370.127 b 0.020(max) 0.508(max) b1 0.060(typ) 1.524(typ) c 0.012(max) 0.304(max) d 1.470(max) 37.338(max) e 0.6(typ) 15.24(typ) e1 0.55(max) 13.970(max) e 0.100(typ) 2.540(typ) eb 0.6500.020 16.5100.508 l 0.200(max) 5.080(max) s 0.06(max) 1.524(max) q1 0.08(max) 2.032(max) 15 o (max) 15 o (max)
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 9 ? 28 pin 330 mil sop package outline dimension unit sym. inch(base) mm(ref) a 0.120(max) 3.048(max) a1 0.002(min) 0.05(min) a2 0.0980.005 2.4890.127 b 0.016(typ) 0.406(typ) c 0.010(typ) 0.254(typ) d 0.728(max) 18.491(max) e 0.340(max) 8.636(max) e1 0.4650.012 11.8110.305 e 0.050(typ) 1.270(typ) l 0.038(max) 0.965(max) l1 0.0670.008 1.702 0.203 s 0.047(max) 1.194(max) y 0.004(max) 0.102(max) 0 o 10 o 0 o 10 o
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 10 ? 28 pin 8x13.4mm stsop package outline dimension 1 14 15 28 c l hd d "a" b e e 12 (2x) 12 (2x) seating plane y 28 15 14 1 c a2 a1 l a 0.254 0 gauge plane 12 (2x) 12 (2x) seating plane "a" datail view l1 symbols dimensions in millimeters dimensions in inches min nom max min nom max a 1.00 1.10 1.20 0.040 0.043 0.047 a 1 0.05 - 0.15 0.002 - 0.006 a 2 0.91 1.00 1.05 0.036 0.039 0.041 b 0.17 0.22 0.27 0.007 0.009 0.011 c 0.07 0.15 0.23 0.003 0.006 0.009 hd 13.20 13.40 13.60 0.520 0.528 0.535 d 11.60 11.80 12.00 0.457 0.465 0.472 e 7.80 8.00 8.20 0.307 0.315 0.323 e - 0.55 - - 0.0216 - l 0.30 0.50 0.70 0.012 0.020 0.028 l1 0.675 - - 0.027 - - y 0.00 - 0.076 0.000 - 0.003 0 3 5 0 3 5
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 11 ? 28 pin 300 mil pdip package outline dimension
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 12 ? ordering information
ly62256 rev. 2.9 32k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 13 ? this page is left blank intentionally.

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